Sleep and wake management in a chiplet-based system
AssigneeQUALCOMM Incorporated
InventorsZhurang ZHAO, Joshua STUBBS, Sathish Kumar MASILAMANI
Life of this patent
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Abstract
A chiplet-based system is provided in which each chiplet includes a power manager. One of the power managers is a primary power manager that coordinates with the remaining power managers after all the chiplets have transitioned to a deep-sleep state in which their resources are powered down to power down each chiplet's die-to-die control plane interface to transition the chiplet-based system to a low-power mode of operation.
Claims20
A chiplet-based system, comprising:
- a primary chiplet including an at least one first system client and a first power manager configured to power down the at least one first system client during a transition of the primary chiplet to a deep-sleep state;
- and
- a secondary chiplet including an at least one second system client and a second power manager configured to power down the at least one second system client during a transition of the secondary chiplet to the deep-sleep state, wherein the first power manager is further configured to command a first die-to-die control plane interface for the primary chiplet and a second die-to-die control plane interface for the secondary chiplet to both power down in response to the transition of both the primary chiplet and the secondary chiplet to the deep-sleep state.
A method for a chiplet-based system including a plurality of chiplets, comprising:
- transitioning each chiplet in the plurality of chiplets into a deep-sleep state;
- and
- powering down a die-to-die control plane interface for each chiplet in the plurality of chiplets to place the chiplet-based system in a low-power mode in response to a detection that each chiplet has entered the deep-sleep state.
A chiplet-based system, comprising:
- a primary chiplet including:
- a plurality of first system clients;
- a first die-to-die control plane interface;
- a first sideband interface;
- and
- a first power manager;
- and
- a secondary chiplet including a plurality of second system clients, wherein the first power manager is configured to command the secondary chiplet over the first sideband interface to power-up the plurality of second system clients during a transition of the chiplet-based system from a low-power mode in which the plurality of first system clients, the plurality of second system clients, and the first die-to-die control plane interface are powered down to an active mode in which the plurality of first system clients, the plurality of second system clients, and the first die-to-die control plane interface are powered up.
Dependencies are inferred from the claim text.