US 2026/0288186 A1 · CURRENT STEERING IN VOLTAGE REGULATORS

Abstract

Embodiments herein relate to electronically linked, e.g., ganged, voltage regulators (VRs) coupled to processor cores or other power-consuming circuits. Circuits are provided to minimize loss mechanisms when the load in the cores is not uniform by optimally distributing current between the VRs. In one approach, a reference current (Iref) is set differently for the different VRs. In another approach, a number of turned-on power transistors (Nfet) is set differently for the different VRs. In another approach, the two above approaches are combined. Changes to Nfet can be made on a faster time scale than changes to Iref. The load in the cores can be determined by monitoring drain voltages, or a difference between drain and source voltages, of power transistors of the VRs.

Claims20

Dependent claims

An apparatus, comprising:

a first processor core and a second processor core;
a primary voltage regulator (VR) coupled to the first processor core;
and
a secondary VR coupled to the second processor core, and electronically linked with the primary VR, wherein the primary VR comprises a respective set of power transistors and a respective driver coupled to the respective set of power transistors, and the secondary VR comprises a respective set of power transistors coupled to a respective set of power transistors.

1 more element

An apparatus, comprising:

a first processor core and a second processor core;
a primary voltage regulator (VR);
and
a secondary VR electronically linked with the primary VR, wherein the primary VR comprises a respective set of power transistors coupled to a respective driver, and the secondary VR comprises a respective set of power transistors coupled to a respective driver, wherein:
the primary VR further comprises a respective Nfet calculation circuit coupled to the respective driver and to the respective set of power transistors;
the secondary VR further comprises a respective Nfet calculation circuit coupled to the respective driver and to the respective set of power transistors;
and
the respective Nfet calculation circuits are configured to provide different values of Nfet based upon a number of power transistors to turn on in the respective set of power transistors of the primary VR and a number of power transistors to turn on in the respective set of power transistors of the secondary VR.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application

19/086,693Filed 21 Mar 2025

Published

24 Sep 2026

Term ends

Not estimatedThe source records don’t support an estimate.

Classification6 codes

G05F 1/59
Using semiconductor devices in series with the load as final control devices: including plural semiconductor devices as final control devices for…
G05F 1/468
Wherein the variable actually regulated by the final control device is DC: characterised by reference voltage circuitry, e.g. soft start, remote…
G05F 1/575
Using semiconductor devices in series with the load as final control devices: characterised by the feedback circuit
G06F 1/26
Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00: power supply means, e.g. regulation thereof

Current steering in voltage regulators

Life of this patent

Current steering in voltage regulators

Life of this patent

Abstract

Claims20