US 2026/0282955 A1 · SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Abstract

A semiconductor package includes a bridge die; an encapsulant; a redistribution structure including redistribution patterns and an upper insulating layer; semiconductor chips disposed on the redistribution structure and electrically connected to the redistribution patterns; connection posts extending in a vertical direction in the encapsulant and electrically connected to the redistribution patterns; and a plurality of connection conductor structures below the bridge die and the connection posts, wherein the plurality of connection conductor structures include a first group of the plurality of connection conductor structures overlapping the bridge die, and a second group of the plurality of connection conductor structures overlapping the connection posts, wherein each of the first group of the plurality of connection conductor structures includes a connection pad; an upper connection solder in contact with and electrically connected to the bridge die on the connection pad; and a lower connection solder below the connection pad.

Claims20

Dependent claims

A semiconductor package, comprising:

a bridge die;
an encapsulant that surrounds the bridge die;
a redistribution structure on the encapsulant and comprising redistribution patterns electrically connected to the bridge die and an upper insulating layer surrounding the redistribution patterns;
semiconductor chips on the redistribution structure and electrically connected to the redistribution patterns;
connection posts that extend in a vertical direction in the encapsulant and electrically connected to the redistribution patterns;
and
a plurality of connection conductor structures below the bridge die and the connection posts,
wherein the plurality of connection conductor structures comprise a first group of the plurality of connection conductor structures that overlap the bridge die, and a second group of the plurality of connection conductor structures that overlap the connection posts, and
wherein each connection conductor structure of the first group of the plurality of connection conductor structures comprises:
a connection pad;
an upper connection solder in contact with and electrically connected to the bridge die on the connection pad;
and
a lower connection solder below the connection pad.

10 more elements

A semiconductor package, comprising:

a bridge die comprising a bridge body, through-vias that extend into the bridge body, a bridge redistribution structure on the bridge body, a lower bridge insulating layer that covers a lower surface of the bridge body, and lower bridge pads below the lower bridge insulating layer and electrically connected to the through-vias;
an encapsulant that surrounds the bridge die;
a redistribution structure on the encapsulant and including an upper insulating layer and redistribution patterns in the upper insulating layer;
and
connection conductor structures electrically connected to the lower bridge pads below the bridge die,
wherein the bridge redistribution structure comprises:
an upper bridge insulating layer;
upper bridge pads on the upper bridge insulating layer and electrically connected to the redistribution patterns;
and
bridge redistribution layers that electrically connect the through-vias to the upper bridge pads in the upper bridge insulating layer,
wherein the encapsulant covers at least a portion of each of an upper surface of the upper bridge insulating layer, a lower surface of the lower bridge insulating layer, side surfaces of the upper bridge pads and side surfaces of the lower bridge pads.

8 more elements

A semiconductor package, comprising:

an encapsulant;
a redistribution structure on the encapsulant, wherein the redistribution structure comprises an upper insulating layer and redistribution patterns in the upper insulating layer;
semiconductor chips on the redistribution structure, and electrically connected to the redistribution patterns;
a bridge die in the encapsulant, and electrically connected to the semiconductor chips through the redistribution patterns;
connection posts spaced apart from the bridge die in a horizontal direction in the encapsulant, wherein the connection posts extend in a vertical direction and are electrically connected to the redistribution patterns;
a first group of connection pads electrically connected to the bridge die below the bridge die;
and
a first group of lower connection solders below lower surfaces of the first group of connection pads,
wherein the lower surfaces of the first group of connection pads are coplanar with a lower surface of the encapsulant.

6 more elements

Dependencies are inferred from the claim text.

Semiconductor package and method of manufacturing the same

Life of this patent

Semiconductor package and method of manufacturing the same

Life of this patent

Abstract

Claims20