Semiconductor device and method of manufacturing the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Chang Sun, Chieh-Fang Chen, Chen-Jun Wu, Chung-Te Lin, Katherine H. Chiang
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Abstract
In some embodiments, a semiconductor structure including an interconnect structure disposed within a dielectric layer is provided. The interconnect structure includes a first lateral conductive portion extending in a first lateral direction and vertically between a lower conductive layer and an upper conductive layer, and a vertical conductive portion extending in a vertical direction, from the lower conductive layer to the upper conductive layer, and laterally contacting the first lateral conductive portion in the first lateral direction.
Claims20
A semiconductor structure, comprising:
- an interconnect structure disposed within a dielectric layer, and comprising:
- a first lateral conductive portion extending in a first lateral direction, and vertically between a lower conductive layer and an upper conductive layer;
- and
- a vertical conductive portion extending in a vertical direction, from the lower conductive layer to the upper conductive layer, and laterally contacting the first lateral conductive portion in the first lateral direction.
A method of manufacturing an integrated chip structure, comprising:
- forming a first dielectric layer over a semiconductor substrate;
- forming a first sacrificial layer in an upper portion of the first dielectric layer;
- forming a deep opening vertically through the first sacrificial layer, and the first dielectric layer;
- performing a removal process to laterally widen the deep opening, and remove the first sacrificial layer laterally exposed by the deep opening to form a first lateral opening;
- and
- filling the deep opening and the first lateral opening with a conductive filling material to respectively form a deep conductive via and a first conductive layer, wherein the deep conductive via and the first conductive layer form an interconnect structure.
A method of manufacturing an integrated chip structure, comprising:
- forming a first etch stop layer over a semiconductor substrate;
- forming a lower portion of a first dielectric layer over the first etch stop layer;
- forming a first sacrificial layer in the first dielectric layer, through the lower portion of the first dielectric layer and through the first etch stop layer;
- forming a second etch stop layer over the first dielectric layer;
- forming a lower portion of a second dielectric layer over the second etch stop layer;
- forming a second sacrificial layer in the second dielectric layer, through the lower portion of the second dielectric layer and through the second etch stop layer;
- forming a deep opening through an upper portion of the second dielectric layer, the second sacrificial layer, an upper portion of the first dielectric layer, and the first sacrificial layer;
- performing a removal process to laterally remove the first sacrificial layer and the second sacrificial layer that are laterally exposed by the deep opening to respectively form a first lateral opening and a second lateral opening and to laterally widen the deep opening;
- and
- filling the deep opening, the first lateral opening, and the second lateral opening with a conductive filling material to respectively form a deep conductive via, a first conductive layer, and a second conductive layer.
Dependencies are inferred from the claim text.