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US 2026/0282502 A1Published application
Method of forming a sealed cavity embedded in a semiconductor wafer
AssigneeAnalog Devices, Inc.
InventorsYingqi Jiang, James G. Fiorenza
Life of this patent
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Abstract
Techniques are described for forming a sealed cavity within a semiconductor wafer, where a conductor wafer includes a structure, such as a T-gate electrode or passive component, formed over a substrate. The sealed-cavity structure may be embedded into the wafer without interfering with any subsequent processes. That is, once the cavity is closed, any subsequent backend processes may continue as usual.
Claims8
A semiconductor device including a sealed cavity, the semiconductor device comprising:
- a substrate;
- a structure formed over the substrate, wherein the structure is positioned within the cavity;
- a passivation layer formed over the cavity, wherein the passivation layer defines at least one hole;
- and
- a cover or sealant formed over the passivation layer, the cover or sealant including a material deposited in and configured to block the at least one hole to cover or seal the cavity.
2 more elements
A semiconductor device including a sealed cavity, the semiconductor device comprising:
- a gallium nitride substrate;
- a T-gate electrode structure formed over the gallium nitride substrate, wherein the T-gate electrode structure is positioned within the cavity;
- a passivation layer formed over the cavity, wherein the passivation layer defines at least one hole;
- and
- a cover or sealant formed over the passivation layer, the cover or sealant including a material deposited in and configured to block the at least one hole to cover or seal the cavity.
2 more elements
Dependencies are inferred from the claim text.