Trench gate mosfet and a method for fabricating the same

A method for fabricating a trench gate MOSFET, comprising:

• providing a semiconductor substrate;
• forming an epitaxial layer overlying the semiconductor substrate, wherein the epitaxial layer has a first surface and a second surface adjoining the semiconductor substrate;
• forming a plurality of trenches in the epitaxial layer, wherein each one of the plurality of trenches is extended from the first surface to an interior of the epitaxial layer;
• forming a first dielectric layer to cover an inner surface of each one of the plurality of trenches and the first surface of the epitaxial layer;
• forming a second dielectric layer to cover the first dielectric layer in each one of the plurality of trenches;
• forming a first shield gate in a lower portion of each one of the plurality of trenches;
• removing an upper portion of the second dielectric layer to expose an upper portion of the first dielectric layer in each one of the plurality of trenches;
• forming a second shield gate on the first shield gate in each one of the plurality of trenches, wherein the second shield gate adjoins part of the exposed upper portion of the first dielectric layer, and wherein the first shield gate and the second shield gate form a shieled gate;
• forming an intermediate insulating layer to cover the shield gate in each one of the plurality of trenches;
• removing the upper portion of the first dielectric layer above the intermediate insulating layer to expose an upper portion of each one of the plurality of trenches, and removing the first dielectric layer on the first surface of the epitaxial layer;
• and
• forming a control gate on the intermediate insulating layer in each one of the plurality of trenches.