Memory device having ferroelectric layer
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYa-Ling Lee, Chung-Te Lin, Han-Ting Tsai, Wei-Gang Chiu, Yen-Chieh Huang, Ming-Yi Yang
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Abstract
A ferroelectric memory device and a semiconductor die are provided. The ferroelectric memory device includes a gate electrode; a channel layer, overlapped with the gate electrode; source/drain contacts, in contact with separate ends of the channel layer; a ferroelectric layer, lying between the gate electrode and the channel layer; and a first insertion layer, extending in between the ferroelectric layer and the channel layer, and comprising a metal carbonitride or a metal nitride.
Claims20
A memory device, comprising:
- a gate electrode;
- a channel layer, overlapped with the gate electrode;
- source/drain contacts, in contact with separate ends of the channel layer, wherein the source/drain contacts are located at different heights;
- a ferroelectric layer, lying between the gate electrode and the channel layer;
- and
- a first insertion layer, extending in between the ferroelectric layer and the channel layer, wherein the channel layer, the first insertion layer and the ferroelectric layer extend from one of the heights to the other one of the heights.
A memory device, comprising:
- a dielectric layer disposed over a substrate;
- a first source/drain contact disposed over the substrate;
- a second source/drain contact disposed over the dielectric layer, wherein the second source/drain is higher than the first source/drain contact;
- a channel layer extending from the first source/drain contact to the second source/drain contact;
- a ferroelectric layer disposed over the channel layer;
- and
- a first barrier layer extending between the ferroelectric layer and the channel layer, and configured to block an inter-diffusion at an interface between the ferroelectric layer and the channel layer.
A memory device, comprising:
- a ferroelectric layer having a first surface and a second surface opposite to each other;
- a channel layer disposed on the first surface of the ferroelectric layer, wherein the channel layer has opposite ends located at different heights;
- a gate electrode disposed on the second surface of the ferroelectric layer;
- and
- a first barrier layer, extending between the ferroelectric layer and the channel layer, wherein the first barrier layer comprises a metal carbonitride or a metal nitride.
Dependencies are inferred from the claim text.