Peripheral memory word line structure

A semiconductor device, comprising:

• a substrate;
• a peripheral word line on the substrate;
• a lower dielectric pattern on the substrate and covering the peripheral word line, the lower dielectric pattern including a first part that covers a lateral surface of the peripheral word line and a second part that covers a top surface of the peripheral word line;
• a contact plug on one side of the peripheral word line, the contact plug penetrating the first part and the second part of the lower dielectric pattern;
• and
• a filling pattern on the second part of the lower dielectric pattern, the filling pattern penetrating at least a portion of the second part,
• wherein the contact plug includes:
• a contact pad on a top surface of the lower dielectric pattern;
• and
• a through plug that penetrates the first part and the second part of the lower dielectric pattern in a first direction perpendicular to a top surface of the substrate, the through plug being connected to the substrate,
• wherein the filling pattern surrounds a lateral of the contact pad of the contact plug,
• wherein the first part and the second part include the same material,
• wherein the peripheral word line includes a metal-containing pattern, and
• wherein the second part of the lower dielectric pattern is in direct contact with a top surface of the metal-containing pattern.