Technologies for printed circuit board layout for directly paralleled electronic devices

An electronic device comprising:

• a substrate comprising a top surface and a bottom surface;
• a first semiconductor device coupled to the top surface of the substrate;
• and
• a second semiconductor device coupled to the bottom surface of the substrate;
• wherein the substrate further comprises (i) a first layer comprising a first conductive trace electrically coupled to a first terminal of the first semiconductor device, (ii) a second layer comprising a second conductive trace electrically coupled to a first terminal of the second semiconductor device, and (iii) a plurality of through-layer vias that electrically couple the first conductive trace and the second conductive trace;
• wherein the first layer and the second layer comprise planar layers stacked vertically, the first conductive trace and the second conductive trace are coextensive when viewed from above the substrate, and the first semiconductor device and the second semiconductor device are coextensive when viewed from above the substrate.