Harmonic rejection upconverter architecture with improved harmonic rejection
AssigneeQUALCOMM Incorporated
InventorOjas CHOKSI
Life of this patent
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Abstract
Certain aspects are directed towards a filter circuit. The filter circuit generally includes: a transimpedance amplifier (TIA) configured to generate an in-phase (I) voltage and a complementary I (IB) voltage; a first set of resistive elements coupled to the TIA and configured to perform a weighted combination of the I voltage with an I with a 45° phase offset (I45) voltage and a complementary quadrature with a 45° phase offset (Q45B) voltage to generate an I output signal of the filter circuit; and a second set of resistive elements coupled to the TIA and configured to perform a weighted combination of the IB voltage with a quadrature with a 45 phase offset (Q45) voltage and a complementary I45 (I45B) voltage to generate an IB output signal of the filter circuit.
Claims20
A wireless communications circuit comprising:
- a filter circuit including:
- a first filter including a first transimpedance amplifier (TIA) and a first resistor-capacitor (RC) network coupled to a first output and a second output of the first TIA;
- a second filter including a second TIA and a second RC network coupled to a first output and a second output of the second TIA;
- a third filter including a third TIA and a third RC network coupled to a first output and a second output of the third TIA;
- and
- a fourth filter including a fourth TIA and a fourth RC network coupled to a first output and a second output of the fourth TIA, wherein the first filter further comprises:
- a first resistive element and a second resistive element having first terminals coupled to the first output and the second output of the second TIA, respectively, and second terminals coupled to a first output and a second output of the first filter, respectively;
- and
- a third resistive element and a fourth resistive element having first terminals coupled to the second output and the first output of the fourth TIA, respectively, and second terminals coupled to the first output and the second output of the first filter, respectively.
A method for signal filtering, comprising:
- generating, via a first filter, an in-phase (I) voltage and a complementary I (IB) voltage;
- performing, via the first filter, a weighted combination of the I voltage with an I with a 45° phase offset (I45) voltage and a complementary quadrature with a 45° phase offset (Q45B) voltage to generate an I output signal of the first filter;
- and
- performing, via the first filter, a weighted combination of the IB voltage with a quadrature with a 45° phase offset (Q45) voltage and a complementary I45 (I45B) voltage to generate an IB output signal of the first filter.
A filter circuit comprising:
- a transimpedance amplifier (TIA) configured to generate an in-phase (I) voltage and a complementary I (IB) voltage;
- a first set of resistive elements coupled to the TIA and configured to perform a weighted combination of the I voltage with an I with a 45° phase offset (I45) voltage and a complementary quadrature with a 45° phase offset (Q45B) voltage to generate an I output signal of the filter circuit;
- and
- a second set of resistive elements coupled to the TIA and configured to perform a weighted combination of the IB voltage with a quadrature with a 45 phase offset (Q45) voltage and a complementary I45 (I45B) voltage to generate an IB output signal of the filter circuit.
Dependencies are inferred from the claim text.