Clock-Controlled Transistor Circuitry and Methods

Abstract

According to one implementation, a circuit includes at least one flip-flop; and clock-sharing circuitry. The clock-sharing circuitry includes a clock-controlled transistor device coupled to at least one shared node of the at least one flip-flop, where the at least one shared node includes at least one of: an intra-flop shared node coupled between two or more logic structures within the at least one flip-flop; and an inter-flop shared node coupled between at least two flip-flops. In one implementation, a method includes; 1) receiving an input clock signal; and 2) distributing the input clock signal to at least one flip-flop, where distributing the input signal includes: coupling the clock signal to a shared clock-controlled transistor device; and sharing the shared clock-controlled transistor device at: an intra-flop shared node between two or more logic structures within a flip-flop; an inter-flop shared node between at least two flip-flops; or both intra-flop and inter-flop shared nodes.

Dependencies are inferred from the claim text.