Storage device, controller and memory device
AssigneeSK hynix Inc.
InventorsDong Young SEO, Hoon CHO, Myeong Woon JEON
Life of this patent
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Abstract
A storage device compares a first error bit number of a first word line included in a first weak word line group of a target memory block during a first period with a preset first reference value, compares the difference between a second error bit number of a second word line included in a strong word line group of the target memory block and the first reference value with a preset second reference value, sets a movement range of data of the target memory block on the basis of a result of comparing the difference with the second reference value, and moves the data to a preset space, whereby it is possible to efficiently perform a refresh operation on a memory block.
Claims20
A storage device comprising:
- a memory including a plurality of memory blocks, each of which includes a plurality of word lines;
- and
- a controller configured to compare a first error bit number of a first word line included in a first weak word line group of a target memory block during a first period with a preset first reference value, compare the difference between a second error bit number of a second word line included in a strong word line group of the target memory block and the first reference value with a preset second reference value, set a movement range of data of the target memory block on the basis of a result of comparing the difference with the second reference value,
- wherein the controller selects a preset space in the memory and moves the data to the preset space.
A memory device comprising:
- a first memory block including a target memory block that includes a first weak word line group and a strong word line group;
- and
- a second memory block to which data of the target memory block is to be moved,
- wherein a movement range for the data of the target memory block that is moved from the first memory block to the second memory block is set on the basis of a first comparison result in which a first error bit number of a first word line included in the first weak word line group of the target memory block during a first period is compared with a preset first reference value and on the basis of a second comparison result in which the difference between a second error bit number of a second word line included in the strong word line group of the target memory block and the first reference value is compared with a preset second reference value.
A controller comprising:
- an error bit search unit configured to check a first error bit number of a first word line included in a first weak word line group of a target memory block located outside during a first period, and check, on the basis of a comparison result between the first error bit number and a preset first reference value, a second error bit number of a second word line included in a strong word line group of the target memory block;
- and
- a movement range determination unit configured to compare the first error bit number with the first reference value, compare the difference between the second error bit number and the first reference value with a preset second reference value, and set, on the basis of a comparison result between the difference and the second reference value, a movement range of data of the target memory block,
- wherein the controller selects a preset space in a memory including the target memory block and moves the data to the preset space.
Dependencies are inferred from the claim text.