Pre-charger circuit of memory device and methods for operating the same

A method for operating a circuit, comprising:

• receiving a plurality of decoded address bits that correspond at least to a first memory array and a second memory array, wherein the first memory array and second memory array share a bit line that is connected to a first pre-charge circuit and a second pre-charge circuit;
• activating, for a first time period within a second time period, the second pre-charge circuit based on a first control signal and a second control signal to charge the bit line to a supply voltage, while the first pre-charge circuit remains activated throughout the second time period to charge the bit line to the supply voltage,
• wherein the second pre-charge circuit comprises a first transistor and a second transistor directly coupled to each other in series with no other connection therebetween, and the coupled first and second transistors are further coupled between the supply voltage and the bit line, and wherein the first transistor and the second transistor are gated by the first control signal and the second control signal, respectively.