Systems and Methods for Efficient Differentiable Logic Gate Networks
AssigneeDiffLogic Inc.
InventorFelix Petersen
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AssigneeDiffLogic Inc.
InventorFelix Petersen
Estimating the term…
Systems and methods are disclosed for implementing and training differentiable logic-gate neural networks. A network includes hyper-logic gate nodes configured as differentiable lookup tables that receive selector signals and LUT entry signals and generate outputs via differentiable selection, enabling LUT-style multiplexing during discretization while remaining trainable by gradient-based optimization. LUT entry signals may be learned parameters, outputs of other nodes, external inputs, or internal memory-state values, enabling aggregation, switching, skip connections, and memory read/write operations. Training may employ constrained or reduced parameterizations that transform unconstrained trainable parameters via elementwise bounding functions and coefficient-mapping matrices to produce coefficient vectors for k-input gate functions, reducing storage and computation relative to enumerating discrete gates. Mixed-precision training may compute forward activations at lower precision while performing backpropagation at higher precision with selective storage or recomputation.
A computing system, comprising:
A computer-implemented method for training a neural network, comprising:
An application-specific integrated circuit (ASIC), comprising:
Dependencies are inferred from the claim text.