Prefetch to last level cache interconnect semantic
AssigneeIntel Products IP LLC
InventorsAshwani KUMAR, Trupti JOSHI, Eliel LOUZOUN
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AssigneeIntel Products IP LLC
InventorsAshwani KUMAR, Trupti JOSHI, Eliel LOUZOUN
Estimating the term…
Methods and apparatus for prefetch to Last Level Cache (LLC) interconnect semantic. The method is implemented in a compute platform including a central processing unit (CPU) coupled to memory and including a plurality of cores, a shared LLC and an input-output (IO) block interconnected via a mesh interconnect. Entries are stored in a context association table including a primary address and one or more context addresses. Inbound transactions originating from the IO device coupled to the IO block are monitored and a corresponding inbound transaction address is compared with primary addresses in the context association table. When there is a match, data stored in memory at the one or more context addresses is prefetched from the memory and installed in the shared LLC. The shared LLC may comprise multiple LLC slices having associated Caching and Home agents (CHAs) co-located with cores at respective nodes in the mesh interconnect.
A method implemented in a compute platform including a central processing unit (CPU) coupled to memory and including a plurality of cores, a shared last level cache (LLC), and an input-output (IO) block interconnected via a mesh interconnect, comprising:
A System on a chip (SoC) or System on Package (SoP) comprising:
An apparatus, comprising an input-output (IO) block having integrated circuitry including,
Dependencies are inferred from the claim text.