Hardware-based power management integrated circuit register file write protection
AssigneeLodestar Licensing Group LLC
InventorMatthew David Rowley
Life of this patent
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Abstract
Disclosed are devices and methods for protecting the register file of a power management integrated circuit (PMIC). In one embodiment, a device is disclosed comprising: a register file comprising a plurality of a registers, at least one register in the register file containing a write register bit (WRB); and an interface configured to receive messages from a host application, the messages including a WRB enablement signal, wherein the device is configured to enable writing to the register file in response to receiving the WRB enablement signal over the interface, write data in response to write messages while writing to the register file is enabled, and disable writing to the register file in response to receiving a stop bit over the interface.
Claims20
A method at a memory system, comprising:
- configuring, based at least in part on receiving a configuration signal from a host system, a first register of a plurality of registers of the memory system, wherein configuring the first register enables a first mode of the memory system by setting a first bit at the first register;
- receiving, from the host system after configuring the first register, a command to write data to one or more registers of the plurality of registers;
- and refraining from writing the data to the one or more registers based at least in part on the first mode of the memory system being enabled.
A memory system, comprising:
- processing circuitry associated with one or more memory devices and configured to cause the memory system to:
- configure, based at least in part on receiving a configuration signal from a host system, a first register of a plurality of registers of the memory system, wherein configuring the first register enables a first mode of the memory system by setting a first bit at the first register;
- receive, from the host system after configuring the first register, a command to write data to one or more registers of the plurality of registers;
- and refrain from writing the data to the one or more registers based at least in part on the first mode of the memory system being enabled.
A non-transitory computer-readable medium storing code, the code comprising instructions executable by one or more processors to:
- configure, based at least in part on receiving a configuration signal from a host system, a first register of a plurality of registers of a memory system, wherein configuring the first register enables a first mode of the memory system by setting a first bit at the first register;
- receive, from the host system after configuring the first register, a command to write data to one or more registers of the plurality of registers;
- and
- refrain from writing the data to the one or more registers based at least in part on the first mode of the memory system being enabled.
Dependencies are inferred from the claim text.