Test circuit and method for operating the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCHIA-WEI HUANG, WEI-JHIH WANG, CHENG-CHENG KUO, YUAN-YAO CHANG
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCHIA-WEI HUANG, WEI-JHIH WANG, CHENG-CHENG KUO, YUAN-YAO CHANG
Estimating the term…
The present disclosure provides a wafer. The wafer includes a die, a scribe line adjacent to the die, and a test circuit adjacent to the scribe line. The test circuit includes a first switch configured to simultaneously couple a first DUT of a first set of DUTs arranged in a first column and a second DUT of a second set of DUTs arranged in a second column to a signal supply node. The test circuit includes a second switch configured to simultaneously couple the first DUT and the second DUT to a signal receive node. The second switch has a node directly coupled to the first DUT, the second DUT, and the first switch. There is no switch connected between the first DUT and the second DUT.
A circuit array, comprising:
A method for manufacturing a circuit array, comprising:
A method for operating a circuit array, the circuit array including:
Dependencies are inferred from the claim text.