Engineering change order cell using dual power rails

An integrated circuit device, comprising:

• a backside power delivery network (BSPDN);
• a frontside power delivery network (FSPDN);
• and
• an engineering change order (ECO) transistor cell structure that is between the BSPDN and the FSPDN,
• wherein the ECO transistor cell structure comprises a first region including a first transistor structure that is electrically connected to the FSPDN, and a second region that is adjacent the first region and electrically connects the FSPDN to the BSPDN.

An integrated circuit device, comprising:

• a backside power delivery network (BSPDN);
• a frontside power delivery network (FSPDN);
• and
• first and second transistor cell structures that are adjacent one another in a first direction and are between the BSPDN and the FSPDN in a second direction that is perpendicular to the first direction, the first transistor cell structure comprising an engineering change order (ECO) cell having a first region and a second region that is adjacent the first region,
• wherein the first region of the ECO cell is free of overlap with the BSPDN in the second direction.