Three-dimensional integrated sensing-memory-computing chip, method for manufacturing the same, and computing method therefor

A three-dimensional integrated sensing-memory-computing chip, comprising a sensing-memory-computing unit array including a plurality of sensing-memory-computing units, each of which comprises:

• a stacked resistive random access-memory device group comprising at least two resistive random access-memory devices stacked in a thickness direction of the three-dimensional integrated sensing-memory-computing chip;
• a sensing device configured to receive an external signal and convert the external signal into an input signal, an output end of the sensing device being coupled to a top electrode of the stacked resistive random access-memory device group;
• and
• a gating device configured to receive a control signal to turned on or off based on the control signal, the gating device being coupled to the top electrode of the stacked resistive random access-memory device group,
• wherein the stacked resistive random access-memory device group is provided between the sensing device and the gating device in a width direction of the three-dimensional integrated sensing-memory-computing chip, and the at least two resistive random access-memory devices share the top electrode, so that the at least two resistive random access-memory devices synchronously receive the input signal and are synchronously turned on and off.