Medium-voltage fin-type field-effect transistors
AssigneeGlobalFoundries U.S. Inc.
InventorsMan Gu, Haiting Wang
Life of this patent
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Abstract
Device structures for a medium-voltage fin-type field-effect transistor and methods of forming such device structures. The structure comprises a field-effect transistor including a semiconductor fin, a first source/drain region, a second source/drain region, a gate that wraps around the semiconductor fin, and a gate dielectric layer between the gate and the semiconductor fin. The gate dielectric layer includes a first dielectric layer and a second dielectric layer on the first dielectric layer, and the gate is laterally positioned between the first source/drain region and the second source/drain region.
Claims20
A structure comprising:
- a first field-effect transistor including a first semiconductor fin, a first source/drain region, a second source/drain region, a first gate that wraps around the first semiconductor fin, and a first gate dielectric layer between the first gate and the first semiconductor fin, the first gate dielectric layer including a first dielectric layer and a second dielectric layer on the first dielectric layer, and the first gate laterally between the first source/drain region and the second source/drain region.
A method comprising:
- forming a field-effect transistor including a semiconductor fin, a first source/drain region, a second source/drain region, a gate that wraps around the semiconductor fin, and a gate dielectric layer between the gate and the semiconductor fin,
- wherein the gate dielectric layer includes a first dielectric layer and a second dielectric layer on the first dielectric layer, and the gate is laterally positioned between the first source/drain region and the second source/drain region.
Dependencies are inferred from the claim text.