Semiconductor process for simultaneously forming a semiconductor structure with features of d-mode and e-mode gan devices

A semiconductor process of simultaneously forming features of depletion mode (D-mode) and enhancement mode (E-mode) GaN devices, comprising:

• providing a substrate with a first region and a second region defined thereon and with a GaN channel layer and an AlGaN layer sequentially formed thereon;
• forming a p-GaN layer on said AlGaN layer in said first region;
• sequentially forming an Al-based passivation layer and a Si-based passivation layer on said AlGaN layer and said p-GaN layer;
• and
• performing a photolithography process to form gate contact openings simultaneously in said first region and said second region, wherein one of said gate contact openings on said first region extends through said Si-based passivation layer and said Al-based passivation layer to a top surface of said p-GaN layer, and one of said gate contact openings in said second region extends through said Si-based passivation layer and said Al-based passivation layer to a surface of said AlGaN layer, and said photolithography process comprises an etching process and a first wet etching process, and said etching process removes said Si-based passivation layer and said first wet etching process removes said Al-based passivation layer.