Semiconductor structure and method for forming the same

A method for forming a semiconductor structure, comprising:

• forming a first semiconductor fin, a second semiconductor fin, and a third semiconductor fin over a substrate and extending lengthwise along a direction;
• partially removing the second semiconductor fin by using a plasma and remaining a tapered root portion of the second semiconductor fin;
• forming an isolation feature over the substrate and between the first semiconductor fin and the third semiconductor fin;
• and
• forming a gate structure over the first semiconductor fin and extending along surfaces of a portion of the first semiconductor fin and the top surface of the isolation feature, wherein the gate structure comprises a gate dielectric layer and at least one metal layer over the gate dielectric layer, and the gate dielectric layer and the isolation feature intermix at an interface between the gate dielectric layer and the isolation feature.

A method for forming a semiconductor structure, comprising:

• forming a first semiconductor fin, a second semiconductor fin, and a third semiconductor fin over a substrate;
• partially etching the second semiconductor fin by using a plasma to form a shark-fin-shaped semiconductor structure;
• forming an isolation feature over the substrate and between the first semiconductor fin and the third semiconductor fin along a direction;
• forming a gate isolation feature over the isolation feature and between the first semiconductor fin and the third semiconductor fin;
• forming a first gate structure over the first semiconductor fin and interfacing a top surface of the isolation feature;
• and
• forming a second gate structure over the third semiconductor fin, wherein the gate isolation feature is between the first gate structure and the second gate structure along the direction, and the gate isolation feature includes a first portion over the isolation feature and a second portion extending into the isolation feature.