US 2026/0269837 A1 · ANALOG-TO-DIGITAL CONVERTER AND CONVERSION METHOD

Abstract

According to an embodiment, a method of operating an analog-to-digital converter may include sampling an analog input signal and inputting the sampled analog input signal to each of a first comparator, a second comparator, and a third comparator, obtaining a first digital output including two bits based on a first output value output as first comparison voltages having a first interval are applied to the first comparator to the third comparator during a first clock cycle, obtaining a second output value by applying second comparison voltages having a second interval smaller than the first interval to the first comparator to the third comparator within a preset range during a second clock cycle, and obtaining a second digital output including three bits based on the second output value when the second output value has a value within the range.

Claims10

Dependent claims

A method of operating an analog-to-digital converter for converting an analog input signal into a digital output in response to a clock cycle, the method comprising:

sampling the analog input signal and inputting the sampled analog input signal to each of a first comparator, a second comparator, and a third comparator;
obtaining a first digital output including two bits based on a first output value output as first comparison voltages having a first interval are applied to the first comparator to the third comparator during a first clock cycle;
obtaining a second output value by applying second comparison voltages having a second interval smaller than the first interval to the first comparator to the third comparator within a preset range during a second clock cycle;
and
obtaining a second digital output including three bits based on the second output value when the second output value has a value within the range.

2 more elements

An analog-to-digital converter comprising:

a first comparator, a second comparator, and a third comparator;
and a control logic circuit configured to output a digital output from an analog input signal using the first comparator to the third comparator based on a clock cycle, wherein the control logic circuit is configured to:
obtain a first digital output consisting of two bits based on a first output value output as first comparison voltages having a first interval are applied to the first comparator to the third comparator during a first clock cycle;
obtain a second digital output consisting of three bits based on the second output value when a second output value output as second comparison voltages having a second interval smaller than the first interval are applied to the first comparator to the third comparator within a predetermined range during a second clock cycle has a value within the range;
and in response to obtaining the second digital output during the second clock cycle, perform offset correction of at least a portion of the first to third comparators during a third clock cycle.

2 more elements

Dependencies are inferred from the claim text.

Analog-to-digital converter and conversion method

Life of this patent

Analog-to-digital converter and conversion method

Life of this patent

Abstract

Claims10