Systems and method for controlling an electrical converter

A non-transitory computer-readable storage medium for storing a computer program, wherein the computer program is configured to control an electrical converter, the electrical converter comprising:

• a main stage, wherein the main stage is configured to convert a direct current voltage into a three phase intermediate voltage and having three main outputs, one for each phase of the intermediate voltage;
• a filter cell stage having three filter cells, wherein:
• each filter cell is coupled to a corresponding one of the three main outputs, and
• wherein the filter cell stage is configured to modify the corresponding phase of the intermediate voltage;
• and
• three bypass switches configured to bypass the filter cells, wherein each of the three bypass switches is electrically coupled to a corresponding one of the three main outputs and to a cell output of the corresponding filter cell;
• and
• wherein when executed by a processor the computer program comprises instructions that cause the processor to:
• determine a main stage pulse pattern for the main stage, wherein the main stage pulse pattern is determined based on a voltage reference signal for the output voltage and wherein the main stage pulse pattern comprises switching instants for the main stage over a next modulation period of the main stage;
• determine a cell pulse pattern for the filter cell stage, wherein the cell pulse pattern is determined from a cell output voltage reference signal, which is determined from the voltage reference signal and a main stage voltage signal determined from the main stage pulse pattern, and wherein the cell pulse pattern comprises switching instants for the three filter cells over the next modulation period;
• apply at least a next switching instant determined from the main stage pulse pattern and the cell pulse pattern to the electrical converter, when all of the filter cells are working properly;
• and
• apply at least a next switching instant determined from the main stage pulse pattern and a modified cell pulse pattern to the electrical converter, when one of the filter cells fails, wherein:
• the failed filter cell is bypassed by activating a corresponding bypass switch of the three bypass switches,
• the modified cell pulse pattern is determined based on an the assumption that a cell voltage provided by the failed filter cell is zero, and
• the intermediate voltage is modified by the two remaining filter cells based on the modified cell pulse pattern in order to provide the output voltage of the electrical converter.

A device for controlling an electrical converter, the device comprising:

• a processor configured to:
• determine a main stage pulse pattern for a main stage of the electrical converter, wherein the main stage pulse pattern is determined based on a voltage reference signal for the output voltage and wherein the main stage pulse pattern comprises switching instants for the main stage over a next modulation period of the main stage;
• determine a cell pulse pattern for a filter cell stage of the electrical converter, wherein the cell pulse pattern is determined from a cell output voltage reference signal, which is determined from the voltage reference signal and a main stage voltage signal determined from the main stage pulse pattern, and wherein the cell pulse pattern comprises switching instants for three filter cells of the electrical converter over the next modulation period;
• apply at least a next switching instant determined from the main stage pulse pattern and the cell pulse pattern to the electrical converter, when all of the filter cells are working properly;
• and
• apply at least a next switching instant determined from the main stage pulse pattern and a modified cell pulse pattern to the electrical converter, when one of the filter cells fails, wherein:
• the failed filter cell is bypassed by activating a corresponding bypass switch of the electrical converter,
• the modified cell pulse pattern is determined based on an assumption that a cell voltage provided by the failed filter cell is zero, and
• the intermediate voltage is modified by the two remaining filter cells based on the modified cell pulse pattern in order to provide the output voltage of the electrical converter;
• and
• a memory configured to store:
• a main stage pulse pattern configured to control a main stage of the electrical converter;
• a cell pulse pattern configured to control the filter cell stage, when all of the filter cells are working properly;
• and
• a modified cell pulse pattern configured to control the filter cell stage, when one of the filter cells fails, wherein the memory is communicatively coupled to the processor.