Voltage regulator module and semiconductor combination
AssigneeMetaPWR Electronics Co., Ltd.
InventorsMingzhun ZHANG, Xiaoni Xin, Yahong Xiong
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Abstract
The present disclosure discloses a structure of a voltage regulator module and a semiconductor combination. The input capacitor is arranged on the bottom surface of the top substrate. By optimizing the layout of the semiconductor combination and optimizing the setting of the power electrical connector, the parasitic parameters of the Voltage regulator module are further reduced, and the conversion efficiency of the voltage regulator module is improved; furthermore, the size of the voltage regulator module is reduced, and the working reliability of the voltage regulator module is improved.
Claims24
A voltage regulator module, comprising:
- a top assembly and an inductor assembly,
- wherein the inductor assembly comprises a magnetic core, a winding, and an electrical connector,
- wherein the magnetic core comprises a groove, a top surface and a bottom surface opposite to each other, a first side surface and a third side surface opposite to each other, and a second side surface and a fourth side surface opposite to each other, the groove is disposed on the top surface of the magnetic core and is recessed from the top surface,
- wherein the winding comprises a first end and a second end, the first end protrudes from a bottom surface of the groove, and the second end is exposed on the bottom surface of the magnetic core,
- wherein the electrical connector comprises a first power electrical connector and a second power electrical connector, the first power electrical connector and the second signal electrical connector are alternately disposed at the side of the magnetic core,
- wherein the top assembly is disposed on a top surface of the inductor assembly, and the top assembly comprises a top substrate, an input capacitor, and a semiconductor combination, the semiconductor combination is disposed on the top substrate, the first end of the winding is electrically connected to the semiconductor combination by means of a top substrate, the input capacitor is accommodated in the groove, and the input capacitor is electrically connected to the semiconductor combination through the top substrate.
A semiconductor combination, comprising a logic control region, a silicon wafer region, a logic pin, an input positive pin, a ground pin, and a switch pin,
- wherein the silicon wafer region comprises a first silicon wafer region and a second silicon wafer region, each of the first silicon wafer region and the second silicon wafer region is provided with the input positive pin, the ground pin, and the switch pin,
- wherein each of the first silicon wafer region and the second silicon wafer region comprises an upper switch and a lower switch, the upper switch and the lower switch are electrically connected to the switch pin, and the upper switch and the lower switch are connected in series and then connected between the input positive pin and the ground pin,
- wherein the logic control region is provided with the logic pin, wherein the logic control region provides a driving signal to the first silicon wafer region and the second silicon wafer region.
Dependencies are inferred from the claim text.