Telemetry-capable memory sub-system
AssigneeMicron Technology, Inc.
InventorDavid Andrew Roberts
Life of this patent
Estimating the term…
Abstract
A subset of cache lines within a segment of the memory device is monitored. The segment comprises a plurality of cache lines. An access counter associated with the segment of the memory device is maintained. The access counter is based on access notifications corresponding to the monitored subset of cache lines. A sampling ratio is determined based on a total number of cache lines in the segment of the memory device or a number of cache lines in the monitored subset. An estimated access count for the segment of the memory device is generated by scaling the access counter using the sampling ratio. A memory management scheme is implemented based on the estimated access count.
Claims20
A system comprising:
- a memory device;
- and
- a processing device, operatively coupled to the memory device, to perform operations comprising:
- monitoring a subset of cache lines within a segment of the memory device, wherein the segment comprises a plurality of cache lines;
- maintaining an access counter associated with the segment of the memory device, wherein the access counter is based on access notifications corresponding to the monitored subset of cache lines;
- determining a sampling ratio based on a total number of cache lines in the segment of the memory device or a number of cache lines in the monitored subset;
- generating an estimated access count for the segment of the memory device by scaling the access counter using the sampling ratio;
- and
- implementing, based on the estimated access count, a memory management scheme.
A method comprising:
- monitoring a subset of cache lines within a segment of a memory device, wherein the segment comprises a plurality of cache lines;
- maintaining an access counter associated with the segment of the memory device, wherein the access counter is based on access notifications corresponding to the monitored subset of cache lines;
- determining a sampling ratio based on a total number of cache lines in the segment of the memory device or a number of cache lines in the monitored subset;
- generating an estimated access count for the segment of the memory device by scaling the access counter using the sampling ratio;
- and
- implementing, based on the estimated access count, a memory management scheme.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- monitoring a subset of cache lines within a segment of a memory device, wherein the segment comprises a plurality of cache lines;
- maintaining an access counter associated with the segment of the memory device, wherein the access counter is based on access notifications corresponding to the monitored subset of cache lines;
- determining a sampling ratio based on a total number of cache lines in the segment of the memory device or a number of cache lines in the monitored subset;
- generating an estimated access count for the segment of the memory device by scaling the access counter using the sampling ratio;
- and
- implementing, based on the estimated access count, a memory management scheme.
Dependencies are inferred from the claim text.