Modification of page tables in shared memory modules
AssigneeLodestar Licensing Group LLC
InventorDmitri Yudanov
Life of this patent
Estimating the term…
Abstract
A memory module system with a global shared context. A memory module system can include a plurality of memory modules and at least one processor, which can implement the global shared context. The memory modules of the system can provide the global shared context at least in part by providing an address space shared between the modules and applications running on the modules. The address space sharing can be achieved by having logical addresses global to the modules, and each logical address can be associated with a certain physical address of a specific module.
Claims20
A system, comprising:
- a plurality of memory modules, each respective memory module of the plurality of memory modules comprising a plurality of partitions of a physical memory, wherein a partition of the plurality of partitions is associated with at least one physical memory address;
- a plurality of processors, wherein each processor of the plurality of processors is associated with a respective memory module of the plurality of memory modules;
- and at least one processor of the plurality of processors configured to:
- map a shared memory address to a physical memory address of the partition of the plurality of partitions;
- and send, based on the physical memory address, to another processor of the plurality of processors that is associated with the physical memory address, data for continuing to execute a program code at least partially executed by the at least one processor.
A method comprising:
- mapping, by one or more of a plurality of processors each associated with a respective memory module of a plurality of memory modules that each comprise a plurality of partitions of a physical memory, a shared memory address to a physical memory address of a partition of the plurality of partitions;
- and sending, based on the physical memory address, to another processor of the plurality of processors that is associated with the physical memory address, data for continuing to execute a program code at least partially executed by at least one of the plurality of processors.
A non-transitory computer readable storage medium for tangibly storing computer program instructions which when executed by a processor, cause the processor to perform a method, comprising:
- mapping, by one or more of a plurality of processors each associated with a respective memory module of a plurality of memory modules that each comprise a plurality of partitions of a physical memory, a shared memory address to a physical memory address of a partition of the plurality of partitions;
- and sending, based on the physical memory address, to another processor of the plurality of processors that is associated with the physical memory address, data for continuing to execute a program code at least partially executed by at least one of the plurality of processors.
Dependencies are inferred from the claim text.