Bmc-based memory resource processing device, method and apparatus, and non-transitory readable storage medium
AssigneeIeit Systems Co., Ltd.
InventorXiaoyu MA
Life of this patent
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Abstract
Disclosed in the present disclosure are a Baseboard Management Controller (BMC)-based memory resource processing device, method and apparatus, and a non-transitory readable storage medium, which are applied to the technical field of computer resource allocation. Each memory bank is correspondingly connected to each Memory Expander Controller (MXC) and a BMC is connected to each MXC and is connected to a Central Processing Unit (CPU); and at least one MXC is connected to the CPU.
Claims21
A Baseboard Management Controller (BMC)-based memory resource processing device, comprising a BMC chip, memory banks, a Central Processing Unit (CPU), and Memory Expander Controller (MXC);
- each memory bank is correspondingly connected to each MXC-chip, and the BMC is connected to each MXC and is connected to the CPU;
- at least one MXC is connected to the CPU;
- and
- the BMC is configured to acquire, after controlling a memory resource pool where each memory bank is located and a computing resource pool where the CPU is located power-on until Basic Input Output System (BIOS) has been initialized, target server identification information in the computing resource pool connected to the CPU, determine that the memory bank which corresponds to the MXC connected to the CPU is a target memory bank according to the target server identification information, and perform a power-on operation on the target memory bank to complete memory resource processing of the BMC.
A Baseboard Management Controller (BMC)-based memory resource processing method, applied to a BMC-based memory resource processing device, the device comprising a BMC, memory banks, a Central Processing Unit (CPU), and Memory Expander Controller (MXC) each memory bank is correspondingly connected to each MXC and the BMC is connected to each MXC and is connected to the CPU;
- at least one MXC is connected to the CPU;
- the method comprises:
- after controlling a memory resource pool where each memory bank is located and a computing resource pool where the CPU is located power-on until BIOS has been initialized, acquiring target server identification information in the computing resource pool connected to the CPU;
- determining that the memory bank which corresponds to the MXC-chip connected to the CPU is a target memory bank according to the target server identification information;
- and
- performing a power-on operation on the target memory bank to complete memory resource processing of the BMC.
18-19. (canceled)
A non-transitory computer readable storage medium, wherein a computer program is stored on the non-transitory computer readable storage medium, and the computer program, when executed by a processor, cause the processor to:
- after controlling a memory resource pool where each memory bank is located and a computing resource pool where the CPU is located power-on until BIOS has been initialized, acquire target server identification information in the computing resource pool connected to the CPU;
- determine that the memory bank which corresponds to the MXC connected to the CPU is a target memory bank according to the target server identification information;
- and
- perform a power-on operation on the target memory bank to complete memory resource processing of the BMC.
Dependencies are inferred from the claim text.