Appratus and operation method for distributed processing of plural operations in data storage system
AssigneeSK hynix Inc.
InventorsKu Ik KWON, Byoung Min JIN, Gyu Yeul HONG
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Abstract
A data storage system includes a controller comprising pipelined multiple processors. The controller is configured to: generate plural instructions having dependency based on a command, input from an external device, for controlling at least one storage device to perform an operation corresponding to the command; allocate the plural instructions to the pipelined multiple processors in stages; and reallocate, when a number of second instructions allocated to a second processor of the pipelined multiple processors becomes a first threshold or greater, at least one of the second instructions to a first processor of the multiple processors.
Claims15
A data storage system, comprising:
- a storage device;
- and
- a controller comprising multiple processors pipelined in stages and configured to control the storage device and receive a plurality of commands including a read command and a write command from an external device, wherein the controller is configured to:
- generate a set of plural instructions for performing one of the plurality of commands received from the external device, wherein the plural instructions have a predetermined order of processing;
- allocate the plural instructions to the multiple processors according to the stages to be performed with the predetermined order;
- and
- reallocate, when a later stage of the multiple processors waits for an earlier stage of the multiple processors to complete instructions allocated to the earlier stage, at least one instruction among the instructions allocated to the earlier stage to the later stage.
A controller comprising multiple processors including a first processor and a second processor pipelined in stages, configured to:
- receive a plurality of commands including a read command and a write command from an external device;
- generate a set of plural instructions for performing one of the plurality of commands received from the external device, wherein the plural instructions have a predetermined order of processing;
- allocate the plural instructions to the pipelined multiple processors according to the stages to be processed with the predetermined order;
- and
- reallocate, when the second processor waits for the first processor to complete instructions allocated to the first processor, at least one instruction among the instructions allocated to the first processor to the second processor.
A data storage system, comprising:
- a storage device;
- and
- a controller comprising multiple processors including a first processor and a second processor pipelined in stages and configured to control the storage device and receive a plurality of commands including a read command and a write command from an external device, wherein the controller is configured to:
- generate a set of plural instructions for performing one of the plurality of commands received from the external device, wherein the plural instructions have a predetermined order of processing;
- allocate the plural instructions to the pipelined multiple processors in stages to be processed sequentially with the predetermined order;
- and
- reallocate, when the first processor becomes a bottleneck in processing the plural instructions, at least one instruction allocated to the first processor among the plural instructions to the second processor.
A method of operating a memory controller comprising a first processor and a second processor pipelined in stages, comprising:
- receiving a command among a read command and a write command from an external device;
- generating a set of plural instructions for performing the received command, wherein the plural instructions have a predetermined order of processing;
- allocating the plural instructions to the first processor and the second processor based on the predetermined order of processing;
- and
- reallocating, when the first processor becomes a bottleneck in processing the plural instructions, at least one instruction allocated to the first processor among the plural instructions to the second processor,
- wherein the first processor becoming the bottleneck indicates a condition in which the second processor waits for at least one instruction allocated to the first processor to be finished.
Dependencies are inferred from the claim text.