Accelerated tage branch prediction with a tage cache

A computer program product embodied in a non-transitory computer readable medium for instruction execution, the computer program comprising code which causes one or more processors to generate semiconductor logic for:

• accessing a processor core, wherein the processor core executes a plurality of instructions, and wherein the processor core includes a tagged geometric (TAGE) branch predictor and a TAGE cache;
• predicting, by the processor core, a conditional branch instruction, wherein the predicting is based on the TAGE branch predictor, and wherein the predicting results in a first prediction;
• searching, in the TAGE cache, for a previous TAGE prediction associated with the conditional branch instruction, wherein the predicting and the searching occur in parallel;
• and
• fetching, by the processor core, from an instruction cache, a next instruction, wherein the fetching is based on the predicting and the searching.

A computer system for instruction execution comprising:

• a memory which stores instructions;
• one or more processors coupled to the memory, wherein the one or more processors, when executing the instructions which are stored, are configured to:
• access a processor core, wherein the processor core executes a plurality of instructions, and wherein the processor core includes a tagged geometric (TAGE) branch predictor and a TAGE cache;
• predict, by the processor core, a conditional branch instruction, wherein the predicting is based on the TAGE branch predictor, and wherein the predicting results in a first prediction;
• search, in the TAGE cache, for a previous TAGE prediction associated with the conditional branch instruction, wherein the predicting and the searching occur in parallel;
• and
• fetch, by the processor core, from an instruction cache, a next instruction, wherein the fetching is based on the predicting and the searching.