Non-volatile memory and programming method thereof

A non-volatile memory comprising:

• a memory cell array comprising a plurality of memory cells, wherein each of a plurality of word lines is coupled to a plurality of memory cells in a corresponding row of the memory cells, and each of a plurality of bit lines is coupled to a plurality of memory cells in a corresponding column of the memory cells;
• and
• a control circuit coupled to the memory cell array, wherein,
• during a programming period for programming a plurality of memory cells of a current word line among the word lines, the control circuit reads at least one threshold voltage of at least one neighboring word line adjacent to the current word line among the word lines;
• the control circuit checks the at least one threshold voltage of the at least one neighboring word line to generate a check result;
• and
• based on the check result, the control circuit adjusts a programming verification voltage used to verify the current word line during the programming period.