Semiconductor package
AssigneeElectronics and Telecommunications Research Institute
InventorHyun-cheol BAE
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AssigneeElectronics and Telecommunications Research Institute
InventorHyun-cheol BAE
Estimating the term…
A semiconductor package includes a semiconductor substrate including an upper surface and a lower surface opposite to each other; a semiconductor chip disposed on the upper surface of the semiconductor substrate and including first and second surfaces opposite to each other; and a silver adhesive layer interposed between the semiconductor substrate and the semiconductor chip, wherein the silver adhesive layer is in contact with the upper surface of the semiconductor substrate and the first surface of the semiconductor chip, and the upper surface of the semiconductor substrate and the first surface of the semiconductor chip face each other, wherein the semiconductor chip includes a wide band gap semiconductor chip, wherein a thickness of the silver adhesive layer in a third direction is in a range of 3μm to 10μm, and the third direction is a direction perpendicular to the upper surface of the semiconductor substrate.
A semiconductor package comprising:
A method for semiconductor package, comprising:
Dependencies are inferred from the claim text.