Back to results
US 2026/0255948 A1Published application
Semiconductor device including spacer via structure
AssigneeSamsung Electronics Co., Ltd.
InventorsJanggeun LEE, Jaemyung CHOI, Kang-ill SEO
Life of this patent
Estimating the term…
Abstract
A connection structure for an integrated circuit includes: a 1st layer including a 1st metal line; a 2nd layer, above the 1st layer, including a 1st via; and a 3rd layer, above the 2nd layer, including a 2nd metal line connected to the 1st metal line through the 1st via, wherein the 1st via comprises a spacer structure at a side of an upper portion of the 1st via, the spacer structure comprising an insulation material.
Claims15
A connection structure for an integrated circuit, the connection structure comprising:
- a 1st layer comprising a 1st metal line;
- a 2nd layer, above the 1st layer, comprising a 1st via;
- and
- a 3rd layer, above the 2nd layer, comprising a 2nd metal line connected to the 1st metal line through the 1st via,
- wherein the 1st via comprises a spacer structure at a side of an upper portion, among the upper portion and a lower portion, of the 1st via, and
- wherein the spacer structure comprises an insulation material.
3 more elements
A connection structure for an integrated circuit, the connection structure comprising:
- a 1st layer comprising a 1st metal line;
- a 2nd layer, above the 1st layer, comprising a 1st via;
- and
- a 3rd layer, above the 2nd layer, comprising a 2nd metal line connected to the 1st metal line through the 1st via,
- wherein the 1st via comprises an upper portion and a lower portion connected to the upper portion, and
- wherein a width of a bottom surface of the upper portion is smaller than a width of a top surface of the lower portion contacting the bottom surface of the upper portion, in a first direction.
3 more elements
Dependencies are inferred from the claim text.