Electrostatic discharge dissipation field-effect transistor (esddfet) having a body without lightly doped pocket or a halo region to increase breakdown voltage
AssigneeQUALCOMM Incorporated
InventorsHyunchul Jung, Ravi Pramod Kumar Vedula, Abhijeet Paul
Life of this patent
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Abstract
A radio frequency (RF) circuit is described. The RF circuit includes a first RF FET coupled in series to a first RF port and coupled in parallel to an RF common (RFC) port. The RF device also includes an electrostatic discharge (ESD) dissipation FET (ESDDFET) coupled to the RF common port. The ESDDFET includes a body region not comprising a lightly doped pocket in the body region, a drain region adjacent to a first side of the body region, a source region of the second polarity and adjacent to a second side of the body region opposite the first side and a gate region on the body region.
Claims20
A radio frequency (RF) circuit, comprising:
- a first RF field-effect transistor (FET) coupled in series to a first RF port and coupled in parallel to an RF common port;
- and
- an electrostatic discharge dissipation (ESDD) FET (ESDDFET) coupled to the RF common port, the ESDDFET, comprising:
- a body region of a first polarity, the body region not comprising:
- a lightly doped pocket in the body region;
- a drain region of a second polarity and adjacent to a first side of the body region;
- a source region of the second polarity and adjacent to a second side of the body region opposite the first side;
- and
- a gate region on the body region.
A method for fabricating a radio frequency (RF) circuit, comprising:
- fabricating a first RF field effect transistor (FET);
- fabricating an electrostatic discharge dissipation (ESDD) FET (ESDDFET), comprising;
- fabricating a body region of a first polarity, the body region not comprising:
- a lightly doped pocket in the body region;
- fabricating a drain region of a second polarity and adjacent to a first side of the body region;
- fabricating a source region of the second polarity and adjacent to a second side of the body region opposite the first side;
- and
- fabricating a gate region on the body region;
- coupling the first RF FET in series to a first RF port;
- and
- coupling the ESDDFET to a RF common port and in parallel with the first RF FET.
Dependencies are inferred from the claim text.