High-bitrate fskd dithering compensation circuit
AssigneeSTMicroelectronics International N.V.
InventorsCarlo Porcaro, Jan Milsimer, Giovanni Amedeo Cirillo
Life of this patent
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Abstract
According to an embodiment, a wireless power receiving device includes a demodulator that generates carrier cycle data from a received frequency-shift keying modulated signal with dithering. A high-pass filtering circuit extracts offset values from the carrier cycle data. A polyphase filtering circuit includes multiple smoothing filters and distributes the extracted offset values among these filters based on a dithering pattern length. A compensation circuit stores smoothed offset values from the polyphase filtering circuit in a dithering table during an evaluation window and applies these stored values to compensate carrier cycle data during subsequent demodulation.
Claims20
A wireless power receiving device configured to receive a frequency-shift keying modulated signal with dithering, the wireless power receiving device comprising:
- a demodulator configured to generate carrier cycle data from the received modulated signal;
- a high-pass filtering circuit configured to extract offset values from the carrier cycle data;
- a polyphase filtering circuit comprising a plurality of smoothing filters, the polyphase filtering circuit configured to:
- receive the extracted offset values, and
- distribute the extracted offset values among the plurality of smoothing filters based on a dithering pattern length;
- and
- a compensation circuit configured to:
- store smoothed offset values from the polyphase filtering circuit in a dithering table during an evaluation window, and
- apply the stored offset values to compensate carrier cycle data during a next demodulation.
A dithering compensation circuit for a wireless power receiver, the dithering compensation circuit comprising:
- a high-pass filter configured to extract carrier cycle offsets;
- a polyphase filter comprising:
- a plurality of smoothing filters, and
- a distribution circuit configured to route extracted carrier cycle offsets to respective smoothing filters based on positions within a dithering pattern length;
- a control circuit configured to track completion of an evaluation window comprising multiple dithering pattern lengths;
- and
- a compensation circuit configured to:
- store smoothed offset values from the smoothing filters in a dithering table after completion of the evaluation window, and
- apply the stored offset values to compensate carrier cycle data during a next demodulation.
A method of compensating dithering in frequency-shift keying demodulation, the method comprising:
- performing high-pass filtering on carrier cycle data to extract offset values;
- distributing the extracted offset values among a plurality of smoothing filters based on a dithering pattern length;
- smoothing the distributed offset values using the plurality of smoothing filters over an evaluation window;
- storing the smoothed offset values in a dithering table;
- and
- compensating a next carrier cycle data using the stored offset values during demodulation.
Dependencies are inferred from the claim text.