Distributed power management circuit
AssigneeQorvo US, Inc.
InventorsDaniel E. Brueske, Nadim Khlat
Life of this patent
Estimating the term…
Loading patent…
AssigneeQorvo US, Inc.
InventorsDaniel E. Brueske, Nadim Khlat
Estimating the term…
A distributed power management circuit is provided. The distributed power management circuit includes a main power management integrated circuit (PMIC) and a distributed PMIC separated from the main PMIC. The main PMIC is coupled to the distributed PMIC via a conductive path. Notably, a parasitic capacitance of the main PMIC can interact with a trace inductance of the conductive path to cause an equivalent notch that can degrade linearity performance of the distributed PMIC. In this regard, in embodiments disclosed herein, a deQ circuit is provided in the distributed power management circuit to reduce a quality factor (Q-factor) of the equivalent notch to thereby improve linearity performance of the distributed PMIC. Further, the deQ circuit can be so configured to increase an open loop gain of the distributed PMIC to help reduce current flow in the distributed PMIC to thereby improve overall energy efficiency of the distributed power management circuit.
A distributed power management circuit comprising:
A wireless device comprising:
Dependencies are inferred from the claim text.