Low-power undervoltage lockout circuits
AssigneeQorvo US, Inc.
InventorsDaijiro Otani, Huang Yao
Life of this patent
Estimating the term…
Loading patent…
AssigneeQorvo US, Inc.
InventorsDaijiro Otani, Huang Yao
Estimating the term…
An undervoltage lockout (UVLO) circuit is provided. The UVLO circuit includes a first branch with a first transistor and a feedback transistor, and a second branch with a second transistor. Herein, source electrodes of the first transistor and the second transistor are electrically coupled to an input voltage, a gate electrode and a drain electrode of the first transistor and a gate electrode of the second transistor are electrically coupled to a source electrode of the feedback transistor, and a drain electrode of the second transistor is electrically coupled to a gate electrode of the feedback transistor. In response to the input voltage being below a threshold value, the feedback transistor is turned off. In response to the input voltage being above the threshold value, the feedback transistor is turned on and a voltage at the gate electrode of the feedback transistor becomes a constant voltage value.
An undervoltage lockout (UVLO) circuit, comprising:
The UVLO circuit of clam 12, wherein:
A communication device comprising:
Dependencies are inferred from the claim text.