US 2026/0252525 A1 · SYSTEM AND METHODS FOR DATA COMPRESSION IN LOW POWER DOUBLE DATA RATE-PROCESSING IN MEMORY ON MOBILE SYSTEM ON CHIP

Abstract

A device, system, and method are disclosed for processing-in-memory (PIM) compression. In an embodiment, a method includes obtaining, by an input/output sense amplifier (IOSA) from an associated RAM bank, compressed data; sending, by the IOSA, the compressed data divided into a plurality of portions; receiving, by a respective decompressor of a plurality of decompressors of a PIM block associated with the RAM bank, a respective portion of the compressed data; decompressing, by the respective decompressor, the respective portion of the compressed data to obtain a respective portion of decompressed data; and sending, by the respective decompressor, the respective portion of the decompressed data to a respective Arithmetic Logic Unit (ALU) of a plurality of ALUs of the PIM block for processing.

Claims20

Dependent claims

A processing-in-memory (PIM) compression method, comprising:

obtaining, by an input/output sense amplifier (IOSA) from an associated random access memory (RAM) bank, compressed data;
sending, by the IOSA, the compressed data divided into a plurality of portions;
receiving, by a respective decompressor of a plurality of decompressors of a PIM block associated with the RAM bank, a respective portion of the compressed data;
decompressing, by the respective decompressor, the respective portion of the compressed data to obtain a respective portion of decompressed data;
and
sending, by the respective decompressor, the respective portion of the decompressed data to a respective Arithmetic Logic Unit (ALU) of a plurality of ALUs of the PIM block for processing.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application

19/421,187Filed 16 Dec 2025

Priority

26 Feb 2025

Published

27 Aug 2026

Term ends

Not estimatedThe source records don’t support an estimate.

Classification6 codes

G06F 15/7821
System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package: tightly…
G06F 12/0238
Free address space management: memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
G11C 7/06
Arrangements for writing information into, or reading information out from, a digital store: sense amplifiers; Associated circuits , e.g. timing…
G06F 2212/401
Specific encoding of data in memory or cache: compressed data

System and methods for data compression in low power double data rate-processing in memory on mobile system on chip

Life of this patent

System and methods for data compression in low power double data rate-processing in memory on mobile system on chip

Life of this patent

Abstract

Claims20