Memory system managing multiple logical address spaces
AssigneeKioxia Corporation
InventorsYuki SASAKI, Aurelien TRAN
Life of this patent
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AssigneeKioxia Corporation
InventorsYuki SASAKI, Aurelien TRAN
Estimating the term…
According to one embodiment, a controller of a memory system provides a host with logical address spaces. A plurality of queues of the host include one or more queues allocated to each of the logical address spaces. The controller calculates first use amounts of a nonvolatile memory corresponding to the logical address spaces, respectively, selects a queue from which a command is to be fetched among the plurality of queues, based on the first use amounts, fetches a command from the queue, calculates a predicted use amount of the nonvolatile memory in accordance with the command, and updates a second use amount corresponding to a first logical address space to which the first queue is allocated among the first use amounts by using the predicted use amount.
A memory system comprising:
A memory system comprising:
Dependencies are inferred from the claim text.