Efficient tag checking for dynamically repeating memory accesses

Abstract

Techniques for tag checking for dynamically repeating memory accesses are described. In an embodiment, an apparatus includes instruction decoder circuitry to decode a single instruction, the single instruction having a format including an opcode field, the single instruction having a first opcode value in the opcode field; and execution circuitry coupled to the instruction decoder circuitry, the execution circuitry to perform operations in response to decoding of the single instruction, the operations including performing repeating memory tag checking operations in connection with repeating memory access operations.

Dependencies are inferred from the claim text.