Reference voltage generator

A method comprising:

• receiving, an input power supply at a start-up circuit, the start-up circuit including a first set of N-channel Metal-Oxide Semiconductor (NMOS) transistors coupled in series, at least one of the first set of NMOS transistors corresponding to a diode connected NMOS transistor configured to form a low impendence node;
• providing the input power supply from the start-up circuit to a first reference voltage circuit and a second reference voltage circuit;
• generating, at the first reference voltage circuit, a Proportional to Absolute Temperature (PTAT) voltage based on the input power supply, the first reference voltage circuit comprising a second set of NMOS transistors coupled to a current mirror circuit;
• generating, at the second reference voltage circuit, a Complementary to Absolute Temperature (CTAT) voltage based on the input power supply, the second reference voltage circuit comprising a third set of NMOS transistors, at least one of the third set of NMOS transistors corresponding to a diode connected NMOS transistor;
• and
• combining the CTAT voltage with the PTAT voltage to generate a reference voltage.

A system comprising:

• a voltage divider configured to generate an output including a divided version of a supply voltage;
• a reference voltage generator including a startup circuit configured to generate a temperature independent voltage reference (VREF);
• a comparator configured to process the temperature independent VREF with the output of the voltage divider to generate a comparator output;
• and
• a failsafe unit and a hysteresis unit configured to receive the comparator output and generate a power-on Reset signal based on the a comparator output.