Semiconductor device including nanosheet structure and method for manufacturing the same

A method for manufacturing a semiconductor device, comprising:

• forming two stack sections on a substrate in a first direction normal to the substrate, the two stack sections being spaced apart from each other in a second direction transverse to the first direction and parallel to the substrate, each of the two stack sections including a plurality of sacrificial features and a plurality of channel features which are alternately stacked in the first direction;
• forming a plurality of upper epitaxial portions, a plurality of lower epitaxial portions and a plurality of intermediate epitaxial portions between the two stack sections, each of the plurality of upper epitaxial portions being distal from the substrate in the first direction and disposed at a side of a corresponding one of upper ones of the plurality of channel features, each of the plurality of lower epitaxial portions being proximate to the substrate in the first direction and disposed at a side of a corresponding one of lower ones of the plurality of the channel features, each of the plurality of intermediate epitaxial portions being located between a corresponding one of the upper ones of the plurality of upper epitaxial portions and a corresponding one of the lower ones of the plurality of lower epitaxial portions in the first direction, and disposed at a side of a corresponding one of intermediate ones of the plurality of channel features, the upper ones of the plurality of channel features being distal from the substrate, the lower ones of the plurality of channel features being proximate to the substrate, the intermediate ones of the plurality of channel features being located between the upper ones of the plurality of channel features and the lower ones of the plurality of channel features;
• amorphizing the plurality of upper epitaxial portions and the plurality of intermediate epitaxial portions;
• forming an epitaxial layer on the substrate and between the two stack sections so as to cover the plurality of upper epitaxial portions, the plurality of lower epitaxial portions and the plurality of intermediate epitaxial portions;
• and
• subjecting the plurality of upper epitaxial portions, the plurality of lower epitaxial portions, the plurality of intermediate epitaxial portions, and the epitaxial layer to a thermal treatment.

A semiconductor device, comprising:

• a substrate;
• a plurality of first channel features and a plurality of second channel features which are disposed on the substrate;
• a first metal gate disposed to surround the plurality of first channel features;
• a second metal gate disposed to surround the plurality of second channel features;
• and
• a source/drain portion disposed on the substrate and between the plurality of first channel features and the plurality of second channel features, and including a plurality of stacking faults.