Multi-level digital step attenuator and digital step attenuation device

Abstract

A multi-level digital step attenuator includes an input node, an output node, a hybrid attenuation circuit, and a bypass switch. The hybrid attenuation circuit includes a series circuit portion coupled between the input and output nodes. In a first active state, the hybrid attenuation circuit is switched to form a T-type structure using the series circuit portion and a first shunt unit to provide a first amount of signal attenuation. In a second active state, the hybrid attenuation circuit is switched to form a Pi-type structure using the same series circuit portion and a second shunt unit to provide a second amount of signal attenuation. The active states share the series circuit portion as a signal attenuation path. A digital step attenuation device includes multiple stages, and is implemented by the hybrid multi-level digital step attenuator and is controlled by a 2-bit control signal to provide three attenuation states.

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