Intelligent frame slicing for reducing latency in image signal processing
AssigneeNVIDIA Corporation
InventorsFeng Zhou, Hang Chen, Jun Liu, Rongrong Zhou, Ying Zhou, Aki P. Niemi
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Abstract
Systems and methods for reducing image signal processor (ISP) latency in video acquisition and processing pipelines. In at least one embodiment, processing circuitry is provided in a video acquisition and processing pipeline to perform intelligent slicing of video frames for reducing ISP latency. In at least one embodiment, the intelligent slicing determines slice pixel height based on camera information and an ISP clock rate.
Claims20
A method for acquiring video input via a camera system, the method comprising:
- obtaining camera configuration information for the camera system;
- obtaining an image signal processor (ISP) clock speed for an ISP;
- determining, based on the camera configuration information and the ISP clock speed, a first slice pixel height for one or more first slices of a video frame to be captured by the camera system and a last slice pixel height for a last slice of the video frame;
- acquiring, by the camera system, the one or more first slices of the video frame with the first slice pixel height and the last slice of the video frame with the last slice pixel height;
- and
- performing, by the ISP, ISP processing of the one or more first slices of the video frame and the last slice of the video frame.
A system for acquiring and processing video input, the system comprising:
- processing circuitry to:
- receive camera configuration information for a camera system comprising one or more cameras;
- receive an image signal processor (ISP) clock speed for an ISP;
- determine, based on the camera configuration information and the ISP clock speed, a first slice pixel height for one or more first slices of a video frame to be captured by the camera system and a last slice pixel height for a last slice of the video frame;
- wherein the camera system is configured to acquire the one or more first slices of the video frame with the first slice pixel height and the last slice of the video frame with the last slice pixel height;
- and
- wherein the ISP is configured to perform ISP processing of the one or more first slices of the video frame and the last slice of the video frame.
A system comprising:
- processing circuitry to determine, based on camera configuration information and an ISP clock speed, a first slice pixel height for one or more first slices of a video frame to be captured by a camera system and a last slice pixel height for a last slice of the video frame.
Dependencies are inferred from the claim text.