Emulated full frame buffers for liquid crystal display controllers

A microcontroller unit for emulating a full frame buffer for a controller for a display, the microcontroller unit comprising:

• a frame buffer physical memory space;
• a graphics framework module configured to render a plurality of image frames to be displayed on a display, each image frame rendered in two or more equal size logical blocks, each logical block corresponding to a different portion of the image frame being rendered;
• and
• a controller module configured to read each rendered logical block from the frame buffer physical memory space and provide each rendered logical block to the display;
• wherein a size of each of the logical blocks corresponds to a size of the frame buffer physical memory space;
• wherein the graphics framework module is configured to write each rendered logical block sequentially into the frame buffer physical memory space;
• wherein, as the controller module is reading each logical block from the frame buffer physical memory space, the graphics framework module is configured to render and write into the frame buffer physical memory space a different, subsequent part of a same logical block of a same image frame, a subsequent logical block of the same image frame, or a first logical block of a subsequent image frame;
• and
• wherein the graphics framework module is configured to begin rendering and writing the different, subsequent part of the same logical block of the same image frame, the subsequent logical block of the same image frame, or the first logical block of the subsequent image frame into the frame buffer physical memory space after the controller module has read a number of lines of a previously written portion of a logical block from the frame buffer physical memory space.

A method for emulating a full frame buffer for a controller for a display, the method comprising:

• rendering, by a graphics framework module, a plurality of image frames to be displayed on a display, each image frame rendered in two or more equal size logical blocks, each logical block corresponding to a different portion of the image frame being rendered;
• writing, by the graphics framework module, each rendered logical block sequentially into a frame buffer physical memory space;
• reading, by a controller module, each rendered logical block from the frame buffer physical memory space;
• and
• providing, by the controller module, e each rendered logical block to the display;
• wherein a size of each of the logical blocks corresponds to a size of the frame buffer physical memory space;
• wherein, as the controller module is reading each logical block from the frame buffer physical memory space, the graphics framework module is configured to render and write into the frame buffer physical memory space a different, subsequent part of a same logical block of a same image frame, a subsequent logical block of the same image frame, or a first logical block of a subsequent image frame;
• and
• wherein the graphics framework module is configured to begin rendering and writing the different, subsequent part of the same logical block of a same image frame, the subsequent logical block of the same image frame, or the first logical block of the subsequent image frame into the frame buffer physical memory space after the controller module has read a number of lines of a previously written portion of a logical block from the frame buffer physical memory space.