Page request interface support in handling direct memory access with caching host memory address translation data

A method comprising:

• buffering, in a descriptor queue of a data path interface circuit of a processing device, a plurality of descriptors associated with translation units of a direct memory access (DMA) memory command of a host system, each descriptor to be linked with a pointer comprising a destination in a memory device for data associated with a respective translation unit, wherein the DMA memory command is one of a DMA write command or a non-logical block address (non-LBA) DMA read command;
• sending address translation requests to an address translation circuit for the pointers of respective translation units of the DMA memory command;
• triggering a page request interface (PRI) handler to send a page miss request to a translation agent of the host system upon an address translation request for a first pointer of a first translation unit missing at a cache of the address translation circuit, wherein the page miss request includes a virtual address of the first translation unit;
• and
• discarding the plurality of descriptors to abort execution of the DMA memory command.

A non-transitory computer-readable storage medium storing instructions that, when executed by a processing device of a memory sub-system controller, cause the processing device to perform operations comprising:

• buffering, in a descriptor queue of a data path interface circuit, a plurality of descriptors associated with translation units of a direct memory access (DMA) memory command of a host system, each descriptor to be linked with a pointer comprising a destination in a memory device for data associated with a respective translation unit, wherein the DMA memory command is one of a DMA write command or a non-logical block address (non-LBA) DMA read command;
• sending address translation requests to an address translation circuit for the pointers of respective translation units of the DMA memory command;
• triggering a page request interface (PRI) handler to send a page miss request to a translation agent of the host system upon an address translation request for a first pointer of a first translation unit missing at a cache of the address translation circuit, wherein the page miss request includes a virtual address of the first translation unit;
• and
• discarding the plurality of descriptors to abort execution of the DMA memory command.