Periodic and activity-based memory management
AssigneeMicron Technology, Inc.
InventorsBryan D. Kerstetter, Donald M. Morgan
Life of this patent
Estimating the term…
Abstract
Systems, methods, and apparatuses are provided for periodic and activity-based memory management. A memory management bank can be coupled to a memory management block, wherein the memory management bank includes a plurality of memory banks. Each memory bank of the plurality of memory banks includes an activate counter to increment responsive to the memory bank receiving an activate command and circuitry to determine whether a value of the activate counter is equal to or greater than a wear leveling threshold and perform a wear leveling operation on data stored in the memory bank responsive to determining the value of the activate counter is equal to or greater than the wear leveling threshold.
Claims20
An apparatus, comprising:
- a memory management block, wherein the memory management block includes a memory management counter to increment responsive to a memory management bank receiving a memory management command;
- and
- the memory management bank coupled to the memory management block, wherein each memory bank of a plurality of memory banks of the memory management bank includes circuitry to:
- determine whether a value of the memory management counter is equal to or greater than a sense and flip operation threshold;
- perform a sense and flip operation on data stored in the memory bank responsive to determining the value of the memory management counter is greater than the sense and flip operation threshold;
- and
- perform the sense and flip operation on the data stored in the memory bank responsive to resetting the memory management counter.
A method, comprising:
- performing a sense and flip operation on data stored in a memory bank in response to an activate flag having a first value;
- comparing a value of a counter to a value of a threshold in response to the activate flag having a second value, wherein the counter is a memory management command counter that increments responsive to the memory bank receiving a memory management command;
- resetting the value of counter in response to determining the value of the counter is greater than or equal to the value of the threshold;
- and
- performing the sense and flip operation on the data stored in the memory bank in response to resetting the value of the counter.
A system, comprising:
- a host;
- and
- a memory device coupled to the host, wherein the memory device includes:
- memory management circuitry, wherein:
- the memory management circuitry includes a plurality of memory banks;
- and
- each memory bank of the plurality of memory banks includes:
- a first logic gate to couple the memory bank to a memory management block of the memory management circuitry;
- an activate counter to increment responsive to the memory management circuitry receiving an activate command from the host;
- circuitry to perform a sense and flip operation on data stored in a particular memory bank of the plurality of memory banks in response to resetting a value of the activate counter;
- and
- a second logic gate to couple the particular memory bank to other memory banks of the plurality of memory banks.
Dependencies are inferred from the claim text.