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US 2026/0244418 A1Published application
Ultra-low power coarse-grained reconfigurable arrays with programmable on-chip network
AssigneeCarnegie Mellon University
InventorsBrandon Lucia, Nathan Beckmann, Graham Gobieski
Life of this patent
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Abstract
Disclosed herein is a co-designed compiler and CGRA fabric that achieves both high programmability and extreme energy efficiency. The fabric implements a rich set of control-flow operators that support arbitrary control flow and memory access on the fabric. The fabric is able to realize both energy and area savings over prior art implementations by offloading most control operations into a programmable on-chip network that can re-use existing network switches.
Claims19
A ultra-low power coarse-grained reconfigurable array fabric comprising:
- an array of processing elements;
- a scalar core;
- a bank of SRAM memory;
- and
- a bufferless, 2D-torus on-chip network connecting the array of processing elements.
2 more elements
Dependencies are inferred from the claim text.