Dynamic power rail selection for system-on-chip (soc)

A processing system, comprising:

• a plurality of processing components in a system-on-chip (SoC) or a plurality of chiplets;
• boot rail information control circuitry in the SoC or each of the plurality of chiplets configured to send boot rail information to a power management integrated circuit (PMIC) via a data communication bus, the boot rail information indicating one or more power rails of a plurality of power rails, wherein the PMIC is configured to power up the one or more power rails indicated by the boot rail information;
• and
• boot control circuitry associated with the plurality of processing components configured to boot, in response to power-up of the one or more power rails, one or more processing components supplied by the one or more power rails.