Compact dual loop linear regulator
AssigneeSTMicroelectronics International N.V.
InventorsDorotea Battaglia, Stefano Castorina
Life of this patent
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Abstract
According to an embodiment, a low drop-out (LDO) regulator includes an error amplifier, multiple control loops, and a control circuit. The error amplifier compares a feedback voltage with a reference voltage to generate an error signal. A first control loop includes a first transistor coupled between a first supply voltage and an output voltage. A second control loop includes second and third transistors coupled in series between a second supply voltage and the output voltage. Switches selectively couple the error signal to the gates of the first or third transistor. The control circuit activates the first or second control loop based on supply voltage availability.
Claims20
A low drop-out (LDO) regulator, comprising:
- an error amplifier configured to compare a feedback voltage with a reference voltage and generate an error signal;
- a first control loop comprising a first transistor coupled between a first supply voltage and an output node of the LDO regulator;
- a second control loop comprising a second transistor and a third transistor coupled in series between a second supply voltage and the output node of the LDO regulator;
- a first switch coupled between an output of the error amplifier and a gate of the first transistor;
- a second switch coupled between the output of the error amplifier and a gate of the third transistor;
- and
- a control circuit configured to control the first switch and the second switch to selectively activate the first control loop or the second control loop based on the availability of the first supply voltage and the second supply voltage.
A method for regulating an output voltage of a low drop-out (LDO) regulator, the method comprising:
- comparing a feedback voltage with a reference voltage to generate an error signal;
- selectively activating a first control loop or a second control loop based on the availability of a first supply voltage and a second supply voltage, wherein the first control loop comprises a first transistor coupled between the first supply voltage and the output node of the LDO regulator, and the second control loop comprises a second transistor and a third transistor coupled in series between the second supply voltage and the output node of the LDO regulator;
- controlling the first transistor using the error signal when the first control loop is active;
- and
- controlling the third transistor using the error signal when the second control loop is active.
A low drop-out (LDO) regulator, comprising:
- an error amplifier configured to compare a feedback voltage with a reference voltage and generate an error signal;
- a first transistor coupled between a first supply voltage and an output node of the LDO regulator;
- a second transistor coupled between the first transistor and the output node of the LDO regulator;
- a third transistor coupled between a second supply voltage and the output node of the LDO regulator;
- a fourth transistor coupled between the third transistor and the output node of the LDO regulator;
- a first switch coupled between an output of the error amplifier and a gate of the second transistor;
- a second switch coupled between the output of the error amplifier and a gate of the fourth transistor;
- and
- a control circuit configured to:
- control gate terminals of the first transistor and the third transistor, and
- control the first switch and the second switch to selectively activate a first control loop comprising the first transistor and the second transistor or a second control loop comprising the third transistor and the fourth transistor based on the availability of the first supply voltage and the second supply voltage.
Dependencies are inferred from the claim text.